P5 (microarchitecture)

1989

Design work started in 1989; the team decided to use a superscalar architecture, with on-chip cache, floating-point, and branch prediction.

1990

The preliminary design was first successfully simulated in 1990, followed by the laying-out of the design.

1992

The design was taped out, or transferred to silicon, in April 1992, at which point beta-testing began.

Intel at first planned to demonstrate the P5 in June 1992 at the trade show PC Expo, and to formally announce the processor in September 1992, but design problems forced the demo to be cancelled, and the official introduction of the chip was delayed until the spring of 1993. John H.

1993

The original Pentium microprocessor was introduced by Intel on March 22, 1993.

Intel at first planned to demonstrate the P5 in June 1992 at the trade show PC Expo, and to formally announce the processor in September 1992, but design problems forced the demo to be cancelled, and the official introduction of the chip was delayed until the spring of 1993. John H.

1994

This flaw, discovered in 1994 by professor Thomas Nicely at Lynchburg College, Virginia, became widely known as the Pentium FDIV bug and caused embarrassment for Intel, which created an exchange program to replace the faulty processors. In 1997, another erratum was discovered that could allow a malicious program to crash a system without any special privileges, the "F00F bug".

The 5-volt design resulted in relatively high energy consumption for its operating frequency when compared to the directly following models. ===P54C=== The P5 was followed by the P54C (80502) in 1994, with versions specified to operate at 75, 90, or 100 MHz using a 3.3 volt power supply.

However, with the 0.25 μm Tillamook Mobile Pentium MMX (named after a city in Oregon), the module also held the 430TX chipset along with the system's 512 KB SRAM cache memory. ==Models and variants== ==Competitors== After the introduction of the Pentium, competitors such as NexGen, AMD, Cyrix, and Texas Instruments announced Pentium-compatible processors in 1994.

1995

It was fabricated in a BiCMOS process which has been described as both 0.5 μm and 0.6 μm due to differing definitions. ===P54CQS=== The P54C was followed by the P54CQS in early 1995, which operated at 120 MHz.

It contained 3.3 million transistors, measured 90 mm2 and was fabricated in a 0.35 μm BiCMOS process with four levels of interconnect. ===P24T=== The P24T Pentium OverDrive for 486 systems were released in 1995, which were based on 3.3 V 0.6 μm versions using a 63 or 83 MHz clock.

1996

The Pentium MMX line was introduced on October 22, 1996, and released in January 1997. The new instructions worked on new data types: 64-bit packed vectors of either eight 8-bit integers, four 16-bit integers, two 32-bit integers, or one 64-bit integer.

1997

This flaw, discovered in 1994 by professor Thomas Nicely at Lynchburg College, Virginia, became widely known as the Pentium FDIV bug and caused embarrassment for Intel, which created an exchange program to replace the faulty processors. In 1997, another erratum was discovered that could allow a malicious program to crash a system without any special privileges, the "F00F bug".

The Pentium MMX line was introduced on October 22, 1996, and released in January 1997. The new instructions worked on new data types: 64-bit packed vectors of either eight 8-bit integers, four 16-bit integers, two 32-bit integers, or one 64-bit integer.




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